This invention relates to a feature extraction processor, and, more particularly, to a processor for performing similar functions in parallel for obtaining picture element (pixel) modulation values from a source of data.
As used herein, feature extraction relates to obtaining shapes and/or contours of objects, such as by identifying edges in an image: which may be camouflaged by background noise and/or texture of the image. For example, in accordance with the present invention, the feature extraction processor may operate on a gray level image for extracting pixel modulation values that define parameterized line segments which represent edges in the image. The sequence of line segments may then be compared to known line segment patterns for identifying objects within the image. Applications for image extraction include: target detection and identification, cartographic data extraction, image data compression, counterfeit detection and parts inspection.
Image feature extraction operations typically are performed at a slow rate when attempted to be run on sequential general purpose computers. A presently employed processing technique may use an existing array processor having a single or several powerful, high-speed arithmetic logic units which operate on data for one pixel at a time. Image pixel modulation data may be stored in a mass memory, such as a semiconductor memory for rapid access, and may be transferred across busses at a rate of about 3 megapixels per second (a typical UNIBUS rate).
Although such a system may be adequate for certain applications, it would be desirable to provide a system having increased throughput and processing capability while maintaining an economic advantage over previously employed systems.
Accordingly, it is an object of the present invention to provide a method and apparatus for more rapidly performing image feature extraction operations over that available using a general purpose computer.